Qijun Zhang

Qijun Zhang

PhD student at HKUST

About me

I am Qijun Zhang, a third-year PhD student at the Electronic and Computer Engineering Department of the Hong Kong University of Science and Technology (HKUST) advised by Prof. Zhiyao Xie. Before that, I received the bachelor degree in Computer Science in Tongji University in 2022. My research interests include computer architecture and electronic design automation.

Research Interests

  • Architecture-Level Processor Power Modeling
  • GPU Scale-Up Interconnect Architecture

Education

  • Ph.D. Electronic and Computer Engineering, the Hong Kong University of Science and Technology, Aug. 2023 - Now
  • B.Eng. Computer Science, Tongji University, Sep. 2018 - Jul. 2022

Publication

  • Chen Zhang, Qijun Zhang†, Zhuoshan Zhou, Yijia Diao, Haibo Wang, Zhe Zhou, Zhipeng Tu, Zhiyao Li, Guangyu Sun, Zhuoran Song, Zhigang Ji, Jingwen Leng, and Minyi Guo, “Towards Compute-Aware In-Switch Computing for LLMs Tensor-Parallelism on Multi-GPU Systems”. In 32nd International Symposium on High Performance Computer Architecture (HPCA 2026). († Corresponding Author)

  • Qijun Zhang, Shang Liu, Yao Lu, Mengming Li, and Zhiyao Xie, “ReadyPower: A Reliable, Interpretable, and Handy Architectural Power Model Based on Analytical Framework”. In Asia and South Pacific Design Automation Conference (ASP-DAC 2026).

  • Qijun Zhang, Yao Lu, Mengming Li, Shang Liu, and Zhiyao Xie, “ArchPower: Dataset for Architecture-Level Power Modeling of Modern CPU Design”. In 39th Annual Conference on Neural Information Processing Systems (NeurIPS 2025).

  • Qijun Zhang, Yao Lu, Mengming Li, and Zhiyao Xie, “AutoPower: Automated Few-Shot Architecture-Level Power Modeling by Power Group Decoupling”. In ACM/IEEE Design Automation Conference (DAC 2025).

  • Mengming Li*, Qijun Zhang*, Yongqing Ren, and Zhiyao Xie, “Integrating Prefetcher Selection with Dynamic Request Allocation Improves Prefetching Efficiency”. In 31th IEEE International Symposium on High-Performance Computer Architecture (HPCA 2025). (* Equal Contribution)

  • Qijun Zhang, Mengming Li, Andrea Mondelli, and Zhiyao Xie, “An Architecture-Level CPU Modeling Framework for Power and Other Design Qualities”. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025.

  • Qijun Zhang, Mengming Li, Yao Lu, and Zhiyao Xie, “FirePower: Towards a Foundation with Generalizable Knowledge for Architecture-Level Power Modeling”. In Asia and South Pacific Design Automation Conference (ASP-DAC 2025).

  • Qijun Zhang, and Zhiyao Xie, “Pointer: An Energy-Efficient ReRAM-based Point Cloud Recognition Accelerator with Inter-layer and Intra-layer Optimizations”. In Asia and South Pacific Design Automation Conference (ASP-DAC 2025).

  • Yao Lu*, Qijun Zhang*, and Zhiyao Xie, “Unleashing Flexibility of ML-based Power Estimators Through Efficient Development Strategies”. In ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED 2024). Best Paper Nomination. (* Equal Contribution)

  • Qijun Zhang, Shiyu Li, Guanglei Zhou, Jingyu Pan, Chen-Chia Chang, Yiran Chen, and Zhiyao Xie, “PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions”. In IEEE/ACM International Conference on Computer Aided Design (ICCAD 2023).

  • Mengming Li, Qijun Zhang, Yichuan Gao, Wenji Fang, Yao Lu, Yongqing Ren, and Zhiyao Xie, “Profile-Guided Temporal Prefetching”. In 52th Annual International Symposium on Computer Architecture (ISCA 2025).

  • Wenkai Li, Yao Lu, Wenji Fang, Jing Wang, Qijun Zhang, and Zhiyao Xie, “ATLAS: A Self-Supervised and Cross-Stage Netlist Power Model for Fine-Grained Time-Based Layout Power Analysis”. In ACM/IEEE Design Automation Conference (DAC 2025).

  • Shang Liu, Wenji Fang, Yao Lu, Jing Wang, Qijun Zhang, Hongce Zhang, and Zhiyao Xie, “RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique”. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025.

  • Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, and Zhiyao Xie, “Transferable Pre-Synthesis PPA Estimation for RTL Designs with Data Augmentation Techniques”. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025.

  • Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, and Zhiyao Xie, “Towards Big Data in AI for EDA Research: Generation of New Pseudo Circuits at RTL Stage”. In Asia and South Pacific Design Automation Conference (ASP-DAC 2025).

  • Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, Hongce Zhang, and Zhiyao Xie, “RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution”. In IEEE International Workshop on LLM-Aided Design (LAD 2024). Best Paper Nomination

  • Yao Lu, Shang Liu, Qijun Zhang, and Zhiyao Xie, “RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model”. In Asia and South Pacific Design Automation Conference (ASP-DAC 2024).

  • Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, and Zhiyao Xie, “MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design”. In IEEE/ACM International Conference on Computer Aided Design (ICCAD 2023).